Mark Gilbert’s Blog

A brief summary of the future Intel server products are listed below. Quite a fuss is being made about the desktop and portable processors, Conroe and Merom, and as a result there’s very little to say which hasn’t already been said. However when it comes to the server chips there is some information which is supposedly not general knowledge.
At the end of the erticle I have the processor table which lists the main features of the upcoming products. The whole thing is very heavy going at times, so read it through a few times, I know I had to just to digest the information. The first section is all bulleted and contains lots of infromation, while the table is more a summary of very important information about each processor.

Server/Workstation Processors & Platforms

Dual Core Intel Xeon processor LV (Sossaman)

• First Dual-Core LV offering by Intel
• Great value and industry leading performance per watt for deployments requiring high compute density and power optimization
• Based on Yonah core, 65nm
• 2GHz & 1.66GHz, 2MB of shared L2 cache, 31W, 667 FSB, based on Yonah Core
• 32-bit dual-core processor (36-bit PAE) addressing and Demand Based Switching
• Targeted for Price/ Performance/ watt optimized environments ‘ delivers up to 2.6X perf/watt increase over the Irwindale LV 3GHz.

Tulsa

• Follow on to Paxville MP
• Based on 65nm process technology
• Expected to support Intel Virtualization technology and Pellston technology
• Dual-core processor with 16 MB L3 cache
• Expected in 2006

Dunnington

• Follow on to Tigerton
• Planned for 2008

Truland Platform and Paxville MP/Tulsa Processors

• Dual Core Intel Xeon processor 7000 sequence; Intel E8500/E8501 chipsets
• 1st Server platform with Intel Virtualization Technology shipping today
• Truland has leadership Platform RAS features
• Tulsa Processor coming in 2H’06 is Truland compatible
• Tulsa is dual core on single die based on 65nm technology
• Tulsa has four times the on-die cache of Paxville MP
• 16MB shared on-die (L3) cache for large perf boost; 1MB L2 Cache per core
• Compared w Paxville MP which had 2×2M (or 2×1M) split L2 cache & no L3
• Tulsa has reliability advancements with Pellston technology
• Tulsa Silicon is in OEM validation today

Caneland Platform (Tigerton/Dunnington processors & Clarksboro Chipset)

• New platform, codenamed ‘Caneland,’ in 2007
• Quad-core MP processor, code named ‘Tigerton,’ based on NGMA, 65nm
• Performance/Watt improvements with Intel Core’ microarchitecture
• Delivers higher perf through dedicated high-speed interconnect connecting each processor directly to the chipset increasing the theoretical system bandwidth by >2X
• Will use FBDIMM & will include four memory interconnects
• Processor refresh with Dunnington follows Tigerton
• Drop in to Caneland platform
• Chipset (code named Clarksboro) is first with FBDIMM memory technology in the MP thereby enabling increased memory bandwidth & capacity
• Clarksboro chipset optimizes system traffic and performance
• Introduces I/O Acceleration Technology (IOAT) to MP platforms for the first time

Tigerton

• Part of the ‘Caneland’ platform
• Quad core processor available in 2007 for servers with 4 or more processors
• Based on 65 nm process technology
• New high-speed interconnect

Bensley (Xeon DP, Dempsey, and Blackford & Greencreek chipsets)

• Server platform supporting Dempsey/Woodcrest in 2006, quad-core support with Clovertown in Q1 07
• Blackford (server) & Greencreek (workstation) chipsets
• Expect Dempsey 95W SKUs and performance line (130W); excellent Perf/Watt with majority of volume at 95W
• Top Bin: 3.73GHz/1066 FSB (vs 800 on Lindenhurst), all bins have 2×2M split cache
• 5080 = 3.73GHz/1066MHz 130W
• 5063 = 3.2GHz/1066MHz, 95W
• 5060 = 3.2GHz/1066MHZ, 130W
• 5050 = 3GHz/667MHz, 95W
• 5030 = 2.67GHz/667MHz, 95W
• Shipping platform components based on Dempsey to OEMs in March; OEM system availability with 60 ‘ 90 of Intel shipping components
• Top to Bottom Irwindale refresh w/o premium pricing
• Performance: Up to 2X Performance gain vs Irwindale
• Over Paxville DP: Dempsey is 1.36x, Woodcrest is 1.92x
• Rack Optimized over Irwindale: DMP MV 1.7x, WDC 3x
• Ultra Dense over Irwindale LV: Sossaman 2.6x, WDC LV 3x

Dempsey

• Intel’s 65-nm dual-core processor for dual-processor (DP) Intel Xeon, processor-based servers & workstations, expected to start shipping in Q1 2006 with systems available in Q2 2006. Dempsey will also include HT Technology, hence supporting 4 threads per processor.
• Part of the Bensley (server) and Glidewell (workstation) platforms.
• Based on 65nm process technology
• Supports Intel Virtualization Technology, EM64T, Hyper-Threading and DBS (demand based switching).

Woodcrest

• Next generation DP server dual-core processor that is based upon next generation micro-architecture.
• Launch Q3′06
• Woodcrest SKUs at/under 80W, 1333 FSB, 4M shared cache
• 5160 3GHz, 5150 2.66GHz, 5140 2.33GHz, 5130 2GHz, 5120 1.86GHz, 5110 1.6GHz
• WDC LV/5148: 40W TDP, 2.33GHz/1333MHz FSB; target Q3 shipments

Clovertown

• Intel’s first quad-core CPU for DP platforms; Q1′07 launch target
• Planning 80W roadmap lineup and performance SKU (?120W); 1066 MHz FSB
• Delivers significant increase in processing capacity on Bensley platform
• Same *T features as Woodcrest
• 2×4MB shared L2 cache

Fanwood

• Next generation lower power processor for high density servers and workstations
• Follow-on to Deerfield

Montecito (Intel Itanium Family)

• Dual-Core Intel Itanium 2 processor 9000 sequence (codenamed Montecito)
• Follow-on processor to Madison 9M; First dual core Itanium processor
• 4 threads/ processor , Dual-Core with Hyper-Threading Technology
• Socket and software compatible with Itanium 2 processors
• 100W, 25% lower power; Up to 2x higher perf then todays Mad9M based systems.
• 90-nm process technology, 1.72 billion transistors, 24 MB of on-die L3 cache (12MB L3 on each core , split cache structure)
• L1/L2 for reactive use only: Split cache structure, in each core there is L2 Instruction 1MB/ L2 Data is 256KB, L1 Instruction 16KB/ L1 Data 16KB
• Supporting bus speeds of 400MHz and 533MHz
• Will ship in seed systems in Q4 2005 and ramp in volume in middle of 2006
• Will support Intel Hyper-Threading Technology
• Robust virtual partitioning , Virtualization Technology
• Cache reliability , Pellston

Montvale

• Follow-on to Montecito; dual core technology based on 90nm process
• Planned for 2007

Tukwila (Tanglewood)

• Itanium family MP server multi-core processor; follow-on to Montvale
• Based on 65nm process
• Quad-core technology
• Targeted for 2008
• Goes in next-generation Itanium Platform codenamed Richford

Poulson

• Future generation of the Itanium processor family and a follow on to Tukwila
• Goes in next-generation Itanium Platform codenamed Richford

New Intel Processor Technology Summary

Well that’s it, hope you understood it all, and are a little wiser of what may be coming out of the Intel fabs in the next 18 months.

Cheers

This entry was posted on Monday, May 22nd, 2006 at 12:43 and is filed under Hardware, Technology. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.